// ================================
// 12 bit sar a/d converter test program
//		(c) 2022	1YEN Toru
//
//
//		2024/01/27	ver.1.02
//			blush up
//
//		2022/01/29	ver.1.00
//
// ================================
asm		"mcoc_irom.mif"
#asm		"mcoc_irom.mem"
#asm		"mcoc_irom.dat2",bit16,list
incl	"mcoc115.incl"
incl	"mcvm_lib_wire_h.incl"
# ================================
# string macros
def		prog_name,"test_adc"
def		prog_vers,"1.02"
def		s,"#"							// simulation="" / real fpga="#"
# constants
equ		max_lbuf,64						// size of lbuf
equ		baud,9600						// baud rate
equ		uart_baud,fcpu/baud-1			// uartbaud setting
equ		stws_baud,fcpu/400000-1			// i2c: clock speed
$(s)// ********************************
$(s)equ		stws_baud,fcpu/400000/3-1	// i2c: clock speed for sim
$(s)// ********************************
equ		i2c_mcp4725,0x60				// i2c: MCP4725 slave address
equ		chr_lf,0x0a						// lf code
equ		chr_cr,0x0d						// cr code
equ		chr_cma,0x2c					// comma ',' code
equ		dac_WAIT,10						// dac: stabilization time [ms]
# variables
equ		va,ramtop
equ		dac_wr,va						// dac: dac write data [lsb]/4096
equ		va,va+2
equ		adc_rd,va						// adc: adc read data [lsb]/4096
equ		va,va+2
equ		evl_idx,va						// evl: index counter
equ		va,va+2
equ		evl_anlg,va						// evl: analog data
equ		va,va+2
equ		static_va,va
# array variables
equ		lbuf,va							// receive data buffer
equ		va,va+max_lbuf
equ		array_va,va
# ================================


// ================================
// setup
// ================================

// set sp to the bottom of ram area
ldwi	r7,idrgramt						// idrg: ram top addr.
ldw		r7,[r7]
ldwi	r6,idrgrams						// idrg: ram size
ldw		r6,[r6]
add		r7,r6
movtc	sp,r7

// clear variables
ldwi	r7,ramtop
ldwi	r1,static_va
ldbiu	r0,0
st_clrvar:
stw		[r7],r0
addi	r7,2
cmp		r7,r1
blo		st_clrvar

// uart setting: RXE, TXE, baud rate
ldwi	r7,uartbaud
ldwi	r0,uart_baud
stw		[r7],r0
ldwi	r7,uartctl
ldbiu	r0,uart_rxe|uart_txe
stw		[r7],r0

// stwser setting: clock speed
ldwi	r7,stwmbaud
ldwi	r0,stws_baud
stw		[r7],r0

// adc124 setting:
ldwi	r7,adcctl
ldbiu	r0,adc_adce
stw		[r7],r0
ldw		r0,[r7]
andi	r0,adc_ardy
beq		pcnt-6
ldwi	r7,adcint
ldbiu	r0,adc_cene_a
stw		[r7],r0

// send RDY
ldwi	r1,lab_str_msg_rdy
jalwr7	print

$(s)// ********************************
$(s)// for simulation
$(s)// setup dummy slave
$(s)ldbiu	r0,i2c_mcp4725
$(s)ldwi	r7,stwsadr
$(s)stw		[r7],r0
$(s)// dac write test
$(s)ldwi	r1,0xa56
$(s)jalwr7	dac_write
$(s)// simulation finish
$(s)cmpi	r0,0
$(s)beq		pcnt+6
$(s)ldwi	r0,simfail
$(s)bra		pcnt+4
$(s)ldwi	r0,simpass
$(s)ldwi	r7,simfnsh
$(s)stw		[r7],r0
$(s)bra		pcnt-2
$(s)// ********************************


// ================================
// loop
// ================================
loop:

// ================================
// serial monitor handling
// check uartctl.RAVL
ldwi	r7,uartctl
ldw		r0,[r7]
andi	r0,uart_ravl
beq		no_data
jalwr7	get_line

// check "daco," command
ldwi	r1,lbuf
ldwi	r2,lab_str_cmd_daco
ldbiu	r5,5
jalwr7	strncmp
cmpi	r0,0
bne		daco_notid
// ================================
// daco,<digt_0_4095>
ldwi	r1,lbuf+5
// <digt_0_4095>
jalwr7	atoi
ldwi	r1,0x0fff
and		r0,r1

// dac write
ldwi	r7,dac_wr
stw		[r7],r0
mov		r1,r0
jalwr7	dac_write
cmpi	r0,0
bne		daco_err

// delay dac_WAIT
ldwi	r1,dac_WAIT
jalwr7	delay

// adc read (12 bit data)
ldwi	r7,adcint
ldw		r0,[r7]
ori		r0,adc_cenf_a
stw		[r7],r0							// flag clear
ldwi	r7,adcctl
ldbiu	r0,adc_adce|adc_cenb|adc_csel_0
stw		[r7],r0
pause
ldwi	r7,adcdat0
ldw		r0,[r7]
ldwi	r7,adc_rd
stw		[r7],r0

// response
bra		daco_ok
daco_err:
// ERROR:
ldwi	r1,lab_str_err_daco
jalwr7	print
bra		no_data

daco_ok:
# "OK: daco="
ldwi	r1,lab_str_msg_daco
jalwr7	print
pushw	r1
# dac_wr
ldwi	r7,dac_wr
ldw		r1,[r7]
jalwr7	print_hex
popw	r1
jalwr7	print
pushw	r1
# adc_rd
ldwi	r7,adc_rd
ldw		r1,[r7]
jalwr7	print_hex
popw	r1
jalwr7	print
bra		no_data
daco_notid:

// check "eval" command
ldwi	r1,lbuf
ldwi	r2,lab_str_cmd_eval
ldbiu	r5,4
jalwr7	strncmp
cmpi	r0,0
bne		eval_notid
// ================================
// eval
jalwr7	eval_adc

// response
cmpi	r0,0
beq		eval_ok
// ERROR:
ldwi	r1,lab_str_err_eval
jalwr7	print
bra		no_data

eval_ok:
ldwi	r1,lab_str_msg_eval
jalwr7	print
bra		no_data
eval_notid:

// check "who" command
ldwi	r1,lbuf
ldwi	r2,lab_str_cmd_who
jalwr7	strcmp
cmpi	r0,0
bne		who_notid
// ================================
// who
// response
ldwi	r1,lab_str_msg_who
jalwr7	print
bra		no_data
who_notid:

// check "help" command
ldwi	r1,lbuf
ldwi	r2,lab_str_cmd_help
jalwr7	strcmp
cmpi	r0,0
bne		help_notid
// ================================
// help
// response
ldwi	r1,lab_str_msg_help
jalwr7	print_lst
bra		no_data
help_notid:

// ================================
// ignore empty line
ldwi	r1,lbuf
ldb		r0,[r1]
cmpi	r0,0
beq		no_data
// ================================
// ERROR: unsupported command
ldwi	r1,lab_str_err_unspt
jalwr7	print
pushw	r1
ldwi	r1,lbuf
jalwr7	print
popw	r1
jalwr7	print
bra		no_data

// ERROR: syntax
err_syntx:
ldwi	r1,lab_str_err_syntx
jalwr7	print
bra		no_data

// end of command interpretation
no_data:


// ================================
// end of loop
bra		loop


// ================================
// evaluate adc124
//	return: r0 (error, or not)
// ================================
eval_adc:
// for (idx=0; idx<4096; idx++)
ldbiu	r0,0
ldwi	r7,evl_idx
stw		[r7],r0
// {
evl_loop:
// dac12_write (idx);
mov		r1,r0
jalwr7	dac_write
cmpi	r0,0
bne		evl_return

// delay (dac12_WAIT);
ldwi	r1,dac_WAIT
jalwr7	delay

// anlg=adc_read ();
// adc read (12 bit data)
ldwi	r7,adcint
ldw		r0,[r7]
ori		r0,adc_cenf_a
stw		[r7],r0							// flag clear
ldwi	r7,adcctl
ldbiu	r0,adc_adce|adc_cenb|adc_csel_0
stw		[r7],r0
pause
ldwi	r7,adcdat0
ldw		r0,[r7]
ldwi	r7,evl_anlg
stw		[r7],r0

// sprintf (lbuf,"%d,%d",idx,anlg);
// Serial.println (lbuf);
ldwi	r1,lab_str_msg_eval_data
jalwr7	print
pushw	r1
# idx
ldwi	r7,evl_idx
ldw		r1,[r7]
jalwr7	print_dec4
popw	r1
jalwr7	print
pushw	r1
# anlg
ldwi	r7,evl_anlg
ldw		r1,[r7]
jalwr7	print_dec4
popw	r1
jalwr7	print
// }
// end of loop
ldwi	r7,evl_idx
ldw		r0,[r7]
addi	r0,1
stw		[r7],r0
ldwi	r1,4096
cmp		r0,r1
blo		evl_loop

// return
ldbiu	r0,0							// rtncode=ErrNo
evl_return:
rtnw

// ================================
// dac write ; disturbed r1,r2,r7
//	param: r1=12 bit data
//	return: r0 (error, or not)
// ================================
dac_write:
// I2C send: S [ADR,W] [r1>>8] [r1&0xff] P
// make i2c frame
movfc	r7,sp
subi	r7,2*4
movtc	sp,r7
// S [ADR,W]
ldwi	r0,wire_send|wire_star|(i2c_mcp4725<<1)|wire_adrw
stw		[r7],r0
addi	r7,2
// [r1>>8]
mov		r0,r1
#lsfti	r0,-8
cendw	r0
andi	r0,0xff
ldwi	r2,wire_send
add		r0,r2
stw		[r7],r0
addi	r7,2
// [r1&0xff]
mov		r0,r1
andi	r0,0xff
add		r0,r2
stw		[r7],r0
addi	r7,2
// P
ldbiu	r0,wire_stop
stw		[r7],r0

// i2c communication
movfc	r1,sp
jalwr7	mcvm_wire
// destroy i2c frame
movfc	r7,sp
addi	r7,2*4
movtc	sp,r7
// check status
cmpi	r0,0
beq		dwr_endif
// ERROR:
addi	r0,0x10							// wire errcod + offset 0x10
dwr_endif:
rtnw


// ================================
// get line from uart ; disturbed r0,r5~r7
// ================================
get_line:
ldwi	r7,uartrdat
ldwi	r6,uartctl
ldwi	r5,lbuf
gl_loop:
// polling until RAVL=1
ldw		r0,[r6]
andi	r0,uart_ravl
beq		gl_loop
// get byte
ldw		r0,[r7]
stb		[r5],r0
addi	r5,1
// LF code check
cmpi	r0,chr_lf
beq		gl_got
// size check
ldwi	r0,lbuf+max_lbuf-1
cmp		r5,r0
blo		gl_loop
// got line
gl_got:
// string terminate
ldbiu	r0,0
subi	r5,1
stb		[r5],r0
// check CR code
subi	r5,1
ldb		r0,[r5]
cmpi	r0,chr_cr
bne		gl_notcr
ldbiu	r0,0
stb		[r5],r0
gl_notcr:
rtnw

// ================================
// print r1 ; disturbed r0~r2,r6,r7
// ================================
print:
ldwi	r7,uarttdat
ldwi	r6,uartctl
pr_loop:
// get 1 byte
ldb		r2,[r1]
addi	r1,1
cmpi	r2,0
beq		pr_finish
$(s)// ********************************
$(s)ldwi	r7,princhr
$(s)stw		[r7],r2
$(s)bra		pr_loop
$(s)// ********************************
// polling uartctl.TFUL=0
pr_poll:
ldw		r0,[r6]
andi	r0,uart_tful
bne		pr_poll
// send data
stw		[r7],r2
bra		pr_loop
pr_finish:
rtnw

// ================================
// print_lst r1 ; disturbed r0~r2,r6,r7
// ================================
print_lst:
jalwr7	print
ldb		r0,[r1]
cmpi	r0,0
bne		print_lst
rtnw

// ================================
// print_hex r1 ; disturbed r0~r7
//		print r1 as 4 digits hexadecimal number
// ================================
print_hex:
ldbiu	r3,4
$(s)// ********************************
$(s)ldwi	r7,princtl
$(s)ldbiu	r0,prin_nld
$(s)stw		[r7],r0
$(s)ldwi	r7,prinhex
$(s)cmpi	r3,4
$(s)beq		ph_else
$(s)cendw	r1
$(s)stb		[r7],r1
$(s)bra		ph_endif
$(s)ph_else:
$(s)stw		[r7],r1
$(s)ph_endif:
$(s)rtnw
$(s)// ********************************
ldwi	r7,uarttdat
ldwi	r6,uartctl
ldwi	r5,lab_ph_hexdig
ph_loop:
// print nibble
mov		r0,r1
mov		r4,r5
cendw	r0
lsri	r0,4
andi	r0,0x0f
add		r4,r0
ldb		r2,[r4]
// polling uartctl.TFUL=0
ph_poll:
ldw		r0,[r6]
andi	r0,uart_tful
bne		ph_poll
// send data
stw		[r7],r2
// loop
lsli	r1,4
subi	r3,1
bne		ph_loop
rtnw

ph_hexdig:
dats	"0123456789abcdef"

// ================================
// print_chr r1 ; disturbed r0,r7
// ================================
print_chr:
$(s)// ********************************
$(s)ldwi	r7,princhr
$(s)stw		[r7],r1
$(s)rtnw
$(s)// ********************************
// polling uartctl.TFUL=0
ldwi	r7,uartctl
pc_poll:
ldw		r0,[r7]
andi	r0,uart_tful
bne		pc_poll
// send data
ldwi	r7,uarttdat
stw		[r7],r1
rtnw

// ================================
// print decimal4 r1 ; disturbed r0~r4,r6,r7
// ================================
print_dec4:
cmpi	r1,0
bne		pdc_not_0
// 0
ldbiu	r1,0a0
jalwr7	print_chr
bra		pdc_fin

pdc_not_0:
// for each r0=1000, 100, 10, 1
ldwi	r6,lab_pdc_tab
ldbiu	r3,true							// omit leading zero flag
pdc_loop:
ldw		r0,[r6]
cmpi	r0,0
beq		pdc_fin
// r2=r1/r0
ldbiu	r2,0
pdc_div:
sub		r1,r0
blo		pdc_div_endif
addi	r2,1
bra		pdc_div
pdc_div_endif:

// omit leading zero
cmpi	r3,0
beq		pdc_not_omit
cmpi	r2,0
beq		pdc_omit
pdc_not_omit:
// print 1 digit
addi	r2,0a0
pushwm	r0,r1,r7
mov		r1,r2
jalwr7	print_chr
popwm	r7,r1,r0
ldbiu	r3,false
pdc_omit:
// add back r1; loop
add		r1,r0
addi	r6,2
bra		pdc_loop

pdc_fin:
rtnw

pdc_tab:
datw	1000,100,10,1,0

// ================================
// string compare: r0=strcmp (r1,r2) ; disturbed r1~r4
// ================================
strcmp:
ldb		r3,[r1]
addi	r1,1
ldb		r4,[r2]
addi	r2,1
mov		r0,r3
sub		r0,r4
bne		sc_finish
// check nil code
cmpi	r3,0
beq		sc_finish
cmpi	r4,0
bne		strcmp
sc_finish:
rtnw

// ================================
// string n compare: r0=strncmp (r1,r2,r5) ; disturbed r1~r5
// ================================
strncmp:
ldb		r3,[r1]
addi	r1,1
ldb		r4,[r2]
addi	r2,1
mov		r0,r3
sub		r0,r4
bne		snc_finish
// check n character
subi	r5,1
beq		snc_finish
// check nil code
cmpi	r3,0
beq		snc_finish
cmpi	r4,0
bne		strncmp
snc_finish:
rtnw

// ================================
// ascii to integer: r0=atoi (r1)>=0 ; disturbed r1~r3
// ================================
atoi:
ldbiu	r0,0
// r2=[r1]-'0'
ldb		r2,[r1]
subi	r2,0a0
blo		a2i_finish
cmpi	r2,10
bhs		a2i_finish
// r0=10*r0+r2
mov		r3,r0
lsli	r3,3
lsli	r0,1
add		r0,r3
add		r0,r2
// end of loop
addi	r1,1
bra		atoi+2
a2i_finish:
rtnw

// ================================
// delay r1 [ms] ; disturbed r0,r7,sytmctl[MLOE]
// ================================
delay:
$(s)// ********************************
$(s)ldbiu	r1,3
$(s)// ********************************
// sytmmil: set offset
ldwi	r7,sytmctl
ldw		r0,[r7]
andi	r0,~sytm_mloe
stw		[r7],r0
ori		r0,sytm_mloe
stw		[r7],r0
// wait r1 [ms]
ldwi	r7,sytmmill
dly_loop:
ldw		r0,[r7]
cmp		r0,r1
blo		dly_loop
rtnw


// ================================
// c string data
// ================================
str_msg_who:
dats	"OK: $(prog_name) ver.$(prog_vers)\r\n\0"
str_msg_rdy:
dats	"RDY\r\n\0"
str_msg_help:
dats	"OK+ daco,<digt_0_4095>\r\n"
dats	"OK+ eval\r\n"
dats	"OK+ who\r\n"
dats	"OK: help\r\n\0\0"
str_msg_daco:
dats	"OK: daco=0x\0 adc=0x\0 [lsb]\r\n\0"
str_msg_eval:
dats	"OK: eval finished\r\n\0"
str_msg_eval_data:
dats	"\0,\0\r\n\0"
str_err_unspt:
dats	"ERR: unsupported command: \0\r\n\0"
str_err_syntx:
dats	"ERR: syntax\r\n\0"
str_err_daco:
dats	"ERR: could not communicate mcp4725\r\n\0"
str_err_eval:
dats	"ERR: eval returns by error\r\n\0"
str_cmd_daco:
dats	"daco,\0"
str_cmd_eval:
dats	"eval\0"
str_cmd_who:
dats	"who\0"
str_cmd_help:
dats	"help\0"

# ================================
incl	"mcvm_lib_wire_m.incl"

